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Data Sheet
WRITE AND READ OPERATIONS
The I 2 C specification defines several protocols for different
types of read and write operations. The operations used in the
ADM1177 are discussed in this section. Table 6 shows the
abbreviations used in the command diagrams (see Figure 37 to
Figure 42).
Table 6. I 2 C Abbreviations
ADM1177
WRITE COMMAND BYTE
In the write command byte operation, the master device sends a
command byte to the slave device, as follows:
1. The master device asserts a start condition on SDA.
2. The master sends the 7-bit slave address, followed by the
write bit (low).
Abbreviation
S
P
R
W
A
N
QUICK COMMAND
Condition
Start
Stop
Read
Write
Acknowledge
No acknowledge
3.
4.
5.
6.
The addressed slave device asserts an acknowledge
on SDA.
The master sends the command byte. The command byte
is identified by an MSB = 0. An MSB =1 indicates an
extended register write (see the Write Extended Command
Byte section).
The slave asserts an acknowledge on SDA.
The master asserts a stop condition on SDA to end the
transaction.
The quick command operation allows the master to check if the
1
2
3
4
5 6
S ADDRESS W A
slave is present on the bus, as follows:
1. The master device asserts a start condition on SDA.
SLAVE
COMMAND
BYTE
A P
2.
3.
4.
The master sends the 7-bit slave address, followed by the
write bit (low).
The addressed slave device asserts an acknowledge on
SDA.
The master asserts a stop condition on SDA to end the
transaction.
Figure 38. Write Command Byte
The seven LSBs of the command byte are used to configure and
control the ADM1177. Table 7 provides details of the function
of each bit.
1
S
2
SLAVE
ADDRESS
3 4
W A P
Figure 37. Quick Command
Table 7. Command Byte Operations
Bit
C0
Default
0
Name
V_CONT
Function
LSB, set to convert voltage continuously. If readback is attempted before the first conversion is complete,
the ADM1177 asserts an acknowledge and returns all 0s in the returned data.
C1
0
V_ONCE
Set to convert voltage once. Self-clears. I 2 C asserts a no acknowledge on attempted reads until the ADC
conversion is complete.
C2
0
I_CONT
Set to convert current continuously. If readback is attempted before the first conversion is complete, the
ADM1177 asserts an acknowledge and returns all 0s in the returned data.
C3
0
I_ONCE
Set to convert current once. Self-clears. I 2 C asserts a no acknowledge on attempted reads until the ADC
conversion is complete.
C4
0
VRANGE
Selects different internal attenuation resistor networks for voltage readback. A 0 in C4 selects a 14:1 voltage
divider. A 1 in C4 selects a 7:2 voltage divider. With an ADC full scale of 1.902 V, the voltage at the VCC pin for
an ADC full-scale result is 26.35 V for VRANGE = 0 and 6.65 V for VRANGE = 1.
C5
C6
0
0
N/A
STATUS_RD
Unused.
Status read. When this bit is set, the data byte read back from the ADM1177 is the status byte. It contains the
status of the device alerts. See Table 15 for full details of the status byte.
Rev. C | Page 17 of 24
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